SUGGESTED FIX
diff -r 9c6be3edf0dc src/cpu/sparc/vm/sparc.ad
--- a/src/cpu/sparc/vm/sparc.ad
+++ b/src/cpu/sparc/vm/sparc.ad
@@ -2794,7 +2794,9 @@ enc_class Fast_Unlock(iRegP oop, iRegP b
AddressLiteral addrlit(double_address, rspec);
__ sethi(addrlit, $tmp$$Register);
- __ ldf(FloatRegisterImpl::D, $tmp$$Register, addrlit.low10(), $dst$$FloatRegister, rspec);
+ // XXX This is a quick fix for 6833573.
+ //__ ldf(FloatRegisterImpl::D, $tmp$$Register, addrlit.low10(), $dst$$FloatRegister, rspec);
+ __ ldf(FloatRegisterImpl::D, $tmp$$Register, addrlit.low10(), as_DoubleFloatRegister($dst$$reg), rspec);
%}
// Compiler ensures base is doubleword aligned and cnt is count of doublewords
@@ -5902,7 +5904,9 @@ instruct loadConD(regD dst, immD src, o7
AddressLiteral addrlit(double_address, rspec);
__ sethi(addrlit, $tmp$$Register);
- __ ldf(FloatRegisterImpl::D, $tmp$$Register, addrlit.low10(), $dst$$FloatRegister, rspec);
+ // XXX This is a quick fix for 6833573.
+ //__ ldf(FloatRegisterImpl::D, $tmp$$Register, addrlit.low10(), $dst$$FloatRegister, rspec);
+ __ ldf(FloatRegisterImpl::D, $tmp$$Register, addrlit.low10(), as_DoubleFloatRegister($dst$$reg), rspec);
%}
ins_pipe(loadConFD);
%}
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