6978249: spill between cpu and fpu registers when those moves are fast
On some architectures moves between CPU and FPU registers are fast so
they can be used for spilling instead of the stack. This change adds
a new flag UseFPUForSpilling and sets up the spill reg masks to allow
this when the flag is on. Currently for Nehalem class chips it seems
to be a uniform win but we'll keep it under AggressiveOpts for now.
There are some minor changes to spilling logic that are currently
guarded until we determine that they are generally a good idea. I
also moved the logic for PrintFlagsFinal since the initialization of
several subsystems may change some flag values which will be missed by
the current location. Tested with scimark, ctw and the nsk tests on
32 and 64 bit.